1. Field of the Invention
The present invention relates in general to an analog-to-digital converter, more specifically, to a pseudo two-step current-mode analog-to-digital converter.
2. Description of the Related Art
As electronic and digital technology advances, the electronic data in electronic systems are all digitized and processed by means of a strong CPU, thereby enhancing the power and versatility of electronic systems. The analog-to-digital converter (hereinafter referred to as an ADC converter) is an indispensable element for converting analog signals to digital data for further processing, because it is the transforming medium between the analog and digital worlds.
In general, either parallel-connected converters or flash converters are utilized to implement ADC converters, both of which output binary codes from an encoder after an analog signal is sampled and its voltage level is compared with several reference voltage levels. Therefore, the binary codes correspond to one of those reference voltage levels closest to the voltage level of the analog signal.
FIG. 1 schematically depicts the blocking circuit diagram of a conventional flash ADC converter. In the Fig., Vin designates an analog input signal, and binary codes D.sub.1 -D.sub.N constitute digital output codes sent out from an encoder 10. Thus, when composed of N-bits, the digital output codes can provide a resolution of N-bits for the analog input signal Vin. Accordingly, the ADC converter should comprise 2.sup.N reference voltage sources, Vref.sub.-- 1, Vref.sub.-- 2, . . . , and Vref.sub.-- 2.sup.N, as shown in the block 12, and 2.sup.N comparators, CP1, CP2, . . . , and CP2.sup.N, as shown in the block 14. Apparently, in accordance with such a structure, the numbers of the reference voltage sources as well as the comparators are in proportion to the required resolution. In other words, the higher the resolution that is required, the greater the number of reference voltage sources and comparators increase by an exponent of 2. Therefore, the number of electronic devices, and the power consumption as well as the complexity for circuit design thereof will be increased greatly, in exchange for fulfilling the high-resolution purpose.
Referring to FIG. 2, the blocking circuit diagram of a conventional two-step analog-to-digital converter is schematically shown. The reference voltage source 20 includes a plurality of voltage sources to provide a set of rough reference voltages and a set of fine reference voltages. A rough comparing means 21 receives a set of rough reference voltages and an analog input signal Vin and, after comparing the input signal Vin with the set of rough reference voltages, the rough comparing means outputs the upper byte signal 22 as the input of the switch-control logic means 23 and the encoder 26. According to the output signal 22, the fine comparing means 24 are connected to an appropriate set of fine reference voltages by the control of the switch-control logic means. (The fine comparing means 27 is the same under the control of the switch-control logic means.) After comparing the input signal Vin with fine reference voltages, the fine comparing means outputs a lower byte signal 25. The upper byte signal 22 and the lower byte signal 25 are received by the encoder 26 and are transformed into digital output codes {D.sub.1,D.sub.2,D.sub.3, . . . ,D.sub.N }. When the fine comparing means 24 is being compared, the analog-to-digital converter keeps taking the next sample of the analog input signal Vin and holds the sample in the rough comparing means 21 and in the other fine comparing means 27. When the fine comparing means 24 finishes its comparison, then the rough comparing means 22 and the fine comparing means 27 will undergo the analog-to-digital transformation as described above. By such an iterative way of operation, the analog signals can be transformed into digital signals.
It is quite obvious from the above description, the conventional two-step ADC converter carries out its comparison in voltage mode, and therefore cannot obtain a fast processing speed. As the comparator in the conventional ADC converter operates in voltage mode, therefore the voltage ranges of the input signals must be considerable, otherwise the ADC converter cannot convert the data accurately.